STEMs Verify Five-Atom Thick Gate Oxides; Help Define Chip Size Limits
Researchers at Lucent Technologies (Murray Hill, NJ) used scanning transmission electron microscopes (STEMs) to verify that the silicon chip gate oxides (insulating layers) that they created were five-atoms thick—the smallest ever made. The team also showed that a four-atom layer is the fundamental physical limit for silicon dioxide-based insulators.
Silicon Chip Limits
Five-Atom Thick Gate Oxides
Applications
Silicon Chip Limits (Back to Top)
The gate oxide, or insulating layer, is a semiconductor chip's smallest feature. It lies between the transistor's gate electrode, which turns current flow on and off, and the channel through which this current flows. The gate oxide acts as an insulator by protecting the channel from the gate electrode. This prevents short circuits in the chips.
By continually reducing both the gate oxide thickness and the length of the gate electrode, researchers in the semiconductor industry have doubled the transistor's switching speed every 18 to 24 months, following Moore's Law.
In recent years, some researchers have begun to fear that Moore's Law may not always hold true because of the limitations of the gate-oxide layer. Made of silicon dioxide, the gate oxides on today's chips are typically 25-atoms thick. To make chips smaller yet still effective, this layer must be reduced. Once the smallest possible layer is achieved, many researchers believe that a new technology must be created to allow Moore's Law to remain true.
In recently released research, Lucent researchers have produced a five-atom-thick gate oxide layer—the thinnest ever made. They also showed that a four-atom layer is the fundamental physical limit for silicon dioxide-based insulators. This suggests that an alternative insulating material must be found before 2012. Or, if alternative insulating materials are not found, totally new semiconductor technologies will be needed.
Five-Atom Thick Gate Oxides (Back to Top)
For Lucent's researchers to produce ultrathin gate oxides, they needed to "grow" atomic layers that were absolutely uniform and smooth. This was key because the top and bottom layers were adjacent to the silicon itself, leaving only three layers in between. All three of the middle layers needed to be completely intact to prevent electrons from escaping through the gate oxide, which would lead to a short circuit.
To tackle this challenge, researcher Greg Timp and his Bell Labs colleagues first cleaned the silicon. They then used rapid thermal oxidation to grow silicon dioxide. This process exposed the silicon to 1,000° C for 10 sec. Their technique produced a five-atom-thick gate oxide, which was later incorporated into a working transistor.
To verify that their gate-oxide layer was five-atoms thick, Lucent researchers used a STEM, one of the most sophisticated electron microscopy techniques available today. With a STEM, researchers can pinpoint individual atoms, examine how they bind to each other, and determine their electrical properties. This helps the research team determine the insulating characteristics of the layer.
Other Bell Labs researchers working on the project included Thomas Sorsch, Stephen Moccio, Frieder Baumann, and Kenneth Evans-Lutterodt. A portion of the microscopy research was done at Cornell University's Center for Materials Research (Ithaca, NY).
Applications (Back to Top)
The achievement indicates that manufacturers should be able to continue shrinking chips at the current rate for 10 to 12 years using current technology, instead of six years as some have estimated.
"Having extended the fundamental physical limits of silicon dioxide gives the semiconductor industry more time to develop alternative insulating layers," says Lucent researcher David Muller, who worked on the research team that created the ultrathin gate oxides.
Because the Bell Labs findings are based only on research results, reliability and yield issues still must be explored before using these ultrathin gate oxides in manufacturing settings. In full-scale production, the layer would probably have to be about 10-atoms thick to achieve the required smoothness, the scientists reported in the June 24, 1999, issue of Nature.
"Bell Labs research on ultrathin gate oxides is delivering technology advances that we are applying to new generations of communications ICs," says Mark Pinto, chief technology officer for Lucent's Microelectronics Group. "These advances will enable us to provide system-on-a-chip capabilities with more performance and lower power consumption for such demanding applications as third-generation wireless systems."
Lucent Technologies designs, builds, and delivers a wide range of public and private networks, communications systems and software, data networking systems, business telephone systems, and microelectronics components. Bell Laboratories is the R&D division of the company.
For more information, call Steve Eisenberg of Lucent Technologies at 908-582-7474.